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AI Engineering

How ML workloads run on hardware: GPUs, matrix multiplication, memory systems, compilers, and distributed training. Assumes basic linear algebra and some systems background.

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Topic overview
Updated
Known gaps (1)
  • Not yet addressed from the September 2026 site review. Hardware/execution scope needs precise title and prerequisites; correct “Kernal” child title.

Contents

Read the overview

Unmarked notes are working notes: public, not yet reviewed.

Compute4 pages
  1. 1. Hardware AccelerationExplainer
  2. 2. GPUsExplainer
  3. 3. Matrix MultiplicationExplainer
  4. 4. Systolic ArraysExplainer
Software stack4 pages
  1. 5. Memory SystemsExplainer
  2. 6. Compiler OptimizationsExplainer
  3. 7. Kernel and OS OptimisationsExplainer
  4. 8. Distributed AI SystemsExplainer

Here, we are looking at how to map abstract model architectures onto physical hardware in the most efficient, scalable, and reliable way possible.

Implementing AI systems

Systolic ArraysExplainer
Matrix MultiplicationExplainer
Distributed AI SystemsExplainer
Compiler OptimizationsExplainer
Kernel and OS OptimisationsExplainer
Memory SystemsExplainer
GPUsExplainer
Hardware AccelerationExplainer

By the end of this study, the objective is to be able to look at any model architecture paper and immediately conceptualize its implementation footprint.

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